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afea9d5a2c
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Final revision; added custom DRC as project file
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2023-08-05 18:28:35 -07:00 |
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ad96459571
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lexy revises (pcb) front panel with minor silscreen twiddles
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2023-08-05 10:21:42 -07:00 |
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2ce1144628
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lexy revises (pcb) front panel with Futura Hv BT and QuentinEF
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2023-08-04 20:01:18 -07:00 |
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c4e1c30b9b
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Add jlc constraints DRC; replace order number text
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2023-08-04 18:36:35 -07:00 |
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caaf12f2da
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lexy replaces FIREBALL mask/etch with silkscreen
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2023-08-04 15:54:15 -07:00 |
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b554ec2138
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Add footprint items for panel holes; separate panel and pcb into different files
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2023-08-04 14:36:10 -07:00 |
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5a420f07b2
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lexy *rocks* the (pcb) front panel silkscreen
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2023-08-04 12:57:34 -07:00 |
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5082711a98
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Add a front-panel PCB
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2023-08-03 20:03:25 -07:00 |
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cb3a50e19a
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More tweaks after pro review
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2023-07-29 11:24:07 -07:00 |
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19116ba39d
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Apply jlcpcb's design rules, small fixes for those
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2023-07-26 20:18:47 -07:00 |
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7022ad9ddb
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couple more minor clearance tweaks
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2023-07-26 18:49:50 -07:00 |
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9e7b04561b
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Add ground fills, fix some clearance issues, make all power traces large
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2023-07-26 18:32:44 -07:00 |
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6f5ee76aea
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lexy tracks the ratsnest and compactifies the power subsystem
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2023-07-26 16:10:38 -07:00 |
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8576ad9482
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Added input resistor for sync; placed everything on PCB
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2023-07-25 18:02:40 -07:00 |
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972d8b1e07
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lexy adds front panel design and includes 2.5mm centerward shift for input and output jacks
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2023-07-24 19:54:45 -07:00 |
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7f9b624c8e
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lexy tweaks layout with input from sam
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2023-07-24 15:25:48 -07:00 |
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398c2b234c
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Checkpoint after tweaking footprints some more, starting over at 14hp
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2023-07-20 21:21:59 -07:00 |
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cd18ed43dc
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Added hard sync to schematic, laid out PCB with on-board components
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2023-07-19 20:16:19 -07:00 |
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