3
1
Back

Technology DFN_16_05-08-1732.pdf DHC Package; 18-Lead Plastic DFN (5mm x 3mm) (see Linear Technology DFN_18_05-08-1778.pdf DFN20, 6x5, 0.5P; CASE 506CM (see ON Semiconductor 506CN.PDF DC8 Package 8-Lead Plastic Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/84299/vor1142b4.pdf SSO Stretched SO SOIC 2.54 8-Lead Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf 8-pin HTSOP package with missing pin 7 removed (Microchip Packaging Specification 00000049BS.pdf QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc7593.pdf (page 432)), generated with kicad-footprint-generator ipc_gullwing_generator.py VQFP, 128 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/q128.14x14.pdf), generated with kicad-footprint-generator Soldered wire connection with double feed through strain relief, for 6 times 0.15 mm² wires.

New Pull Request