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0.479403 -0.871958 0.0993087 facet normal -0.0570302 -0.0726013 0.995729 facet normal 0.0645475 0.533422 0.843383 facet normal -4.127381e-001 7.075877e-001 5.735564e-001 vertex 1.701279e+000 -4.959860e+000 2.484855e+001 facet normal -0.286341 0.118613 0.950757 facet normal 8.468809e-001 -5.317826e-001 0.000000e+000 vertex 5.358002e+000 -1.912462e+000 1.747200e+001 facet normal 1.950737e-01 9.807886e-01 0.000000e+00 vertex -9.858924e+01 1.059924e+02 1.855000e+01 vertex -1.032505e+02 1.030635e+02 1.055000e+01 vertex -9.500882e+01 1.056905e+02 1.055000e+01 vertex -1.028490e+02 9.422454e+01 2.550000e+00 facet normal 0.703593 0.707111 0.0703601 facet normal -9.480295e-01 -4.671082e-03 3.181483e-01 vertex -1.084545e+02 9.695134e+01 1.105996e+01 facet normal -0.0837833 0.0570902 0.994847 vertex 6.47614 -4.70519 19.9505 facet normal -9.996070e-01 2.803203e-02 -2.635790e-04 facet normal -0.273132 -0.564081 0.779238 facet normal 0.174189 -0.420502 0.890414 facet normal -2.845744e-001 -4.980052e-001 8.191509e-001 vertex 2.567783e+000 4.415591e+000 2.488700e+001 facet normal -0.0127267 0.705404 0.708692 vertex 7.31348 -0.673589 7.09873 facet normal 0.545444 0.815973 -0.191517 facet normal 2.219784e-16 -3.986840e-15 1.000000e+00 facet normal 0.55474 -0.0546157 0.830229 facet normal 0.000176263 0.115309 0.99333 vertex 0.210331 -6.27431 7.81694 facet normal 0.353627 -0.43089 0.83023 facet normal 0.243766 -0.29707 0.923216 vertex 8.82707 1.75581 0 vertex -5.25861 -3.8206 19.9 facet normal 8.419452e-01 -5.395630e-01 3.115468e-04 vertex -9.143866e+01 9.485358e+01 4.255000e+01 facet normal -3.779527e-001 6.475934e-001 6.616453e-001 facet normal -1.570396e-001 -2.761102e-001 9.482098e-001 vertex 4.194869e+000 8.065993e-001 2.494118e+001 facet normal 0.0189296 -0.080194 0.9966 vertex 0 3.04892 6.59 vertex -1.06324 -3.21351 6.59 facet normal -0.264755 -0.918689 0.293113 vertex -4.20094 4.78188 7.71954 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ## GitHub repository * [https://github.com/holmesrichards/precadsr](https://github.com/holmesrichards/precadsr) * [https://gitlab.com/rsholmes/precadsr](https://gitlab.com/rsholmes/precadsr This repo uses submodules aoKicad and Kosmo_panel. To clone: submodules avoid non-circular holes in footprints whenever possible; some fabs charge more for ovals - make power connection traces larger; MK uses a CA3080 OTA, an expensive and rare chip these days ($3/ea on amazon, maybe fakes) VCA MK's VCA Probably a straightforward build: one op-amp, four transistors and some example modules a840574ffb AD&D 1e type faces // PWM duty attenuation /* [Default values] */ // Whether to create a new version of the Software. THE SOFTWARE OR THE USE OR PERFORMANCE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. Copyright 2010-2021 Mike Bostock Permission to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the work preferred for making.

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