3
1
Back

Branch sandwich Checkpoint before trying to add picture Schematics/{schematic_bugs_v1.txt => schematic_bugs_v1.md} | 3 | 100R | Resistor | | Q1, Q2, Q3 | 3 | 100R | Resistor | | J6 | 1 | AudioJack2_SwitchT | Audio Jack, 2 Poles (Mono / TS), Switched T Pole (Normalling)"/> 0d370a24cdcaf6d3fd7f0316855522b79df0fe9a 3583986e89 Finished PCB, passes all passable DRCs created pull request 'pcb_finalization' (#1) from bugfix/10hp into main 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 v1.0 Add CV in implement a DC offset via non-inverting op-amp. - A CV in to pause the clock Add CV (and knob) controlled glide to schematic 16c50fa0a8 Add pulldown resistors for reset debounce cap; formatting col_left = thickness * 1; //right_rib_x = width_mm - 10 ohms between U1-14 and U2-1 when off, more like 1M when off - Glide attenuator (B10k) (join two left pins from below - Glide, manual (A100k) (two left pins, from below Clock rate (B100k) (not sure yet which 2.

New Pull Request