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8976a63dc06fa25beedf8d2553931872c491047e adds README.md file 4f6e9e0984 Updated LICD, alter alt-textify to handle weaker (<6v) signals - Clock rate goes down when resistance goes up, opposite to expectation. Glide fix Notes from debugging Do not assume anything works!** submodules ``` git clone --recurse-submodules git@github.com:holmesrichards/precadsr.git git clone git@gitlab.com:rsholmes/precadsr.git.

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