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1.6mm wire loop as test Point, square 2.5mm side length test point THT pad as test point, loop diameter2.6mm, hole diameter 1.1mm, length 8.5mm, width 2.8mm, e.g. Ettinger 13.13.865, https://katalog.ettinger.de/#p=434 solder Pin_ diameter 1.3mm, wire diameter 1.0mm wire loop as test point, loop diameter2.6mm, hole diameter 1.3mm, length 10.0mm, width 2.4mm solder Pin_ with flat fork, hole diameter 0.9mm, outer diameter 2mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator Mounting Hardware, external M3, height 7, Wuerth electronics 9774040982 (https://katalog.we-online.de/em/datasheet/9774040982.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py TSSOP, 48 Pin (http://ww1.microchip.com/downloads/en/devicedoc/00002117f.pdf#page=70), generated with kicad-footprint-generator JST J2100 series connector, 502386-1470 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DC6 Package; 6-Lead Plastic Dual Flat No-Lead Package, Body 3.0x3.0x0.8mm, Texas Instruments DSBGA BGA YFF S-XBGA-N5 Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 238 0.5 CPG238 Spartan-7 BGA, 14x14 grid, 8x8mm package, pitch 0.4mm pad, based on a decade counter expects CLOCK to pass 1/2 of V+ (i.e. 6v) but many external clock sources cycle between 0v and 5v or even much less. This can be socketed for experimentation, soldered, or socketed at first and then abort the print, to test if the PCB placement. Alternately, pot shafts could be other values, ceramic may work, test debouncing. Maybe enlarge footprint if needed. - Resistor footprint could stand to be even.

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