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5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= 744b72ef7e0d94fccfae99ec3cb3514981ac4616 77735c00cc3285131373f5cfc61b82eab5963d12 Update README.md 8fe829edc2a52299443ce1d2193e2aa04d060c17 From b22080a808f5ee5eddd0b607f432f7fa2c4fb139 Mon Sep 17 00:00:00 2001 Subject: [PATCH] README Repo uses submodules aoKicad and Kosmo_panel, which provide needed libaries for KiCad. To clone: Repo uses submodules aoKicad and Kosmo\_panel. To clone: ``` git clone --recurse-submodules git@github.com:holmesrichards/precadsr.git ``` 4d5fa6d903 Delete 'Panels/futura medium condensed bt.ttf and /dev/null differ Latest commits for file Panels/luther_triangle_vco_quentin_v4.scad Replaced accidentally dropped Fine tuning hole. 52b504dd7c Delete 'Panels/futura medium condensed bt.ttf' Delete 'Panels/Futura XBlk BT.ttf' Panels/Futura XBlk BT.ttf create mode 100644 Schematics/SynthMages.pretty/SOCKET_3_PIN_HEADER_NORMAL.kicad_mod From 5663c8bc865b744661cf82b1abfca64d73c0f2fa Mon Sep 17 00:00:00 2001 Subject: [PATCH] adds ideas for a single 2.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 2mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times 0.15 mm² wires, basic insulation, conductor.

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