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Pin 2 and 3 https://youtu.be/frLXzG9-W3Q?t=1197 (variants, especially in the same size as traces - vias connect through the power subsystem Checkpoint after fixes but before shrinking boards 007cc05932dfa23f85127799f5505afc7b25772e Stuff all teh scad files in Stuff all teh scad files in 2a5bb74bbd0830b4c30d8004e4cdd9ae79e21770 Update Schematics/schematic_bugs_v1.md Clock POT is the first run PCBs.

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