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B26B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator Hirose series connector, 53261-1171 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator Molex CLIK-Mate series connector, B13B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=212), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 32 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ADV7280.PDF#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py WSON, 8 Pin (https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BME680-DS001-00.pdf#page=44), generated with kicad-footprint-generator ipc_noLead_generator.py 8-Lead Very Thin Dual Flatpack No-Lead (LZ) - 2x3x0.9 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf 8-Lead Plastic DFN (3mm x 3mm); Pitch 0.4mm; EP 1.7x1.54mm; for InvenSense motion sensors; keepout area marked (Package see: https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf; See also https://www.invensense.com/wp-content/uploads/2015/02/InvenSense-MEMS-Handling.pdf 24-Lead Plastic QFN (2mm x 2mm), http://ams.com/eng/content/download/950231/2267959/483138 DD Package; 8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/84299/vor1142b4.pdf SSO Stretched SO SOIC Pitch 2.54 SSO Stretched SO SOIC Pitch 2.54 SSO Stretched SO SOIC 2.54 8-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body [SOIC] (https://docs.broadcom.com/docs/AV02-0169EN SOIC 1.27 SSO, 7 Pin Double Sided Module Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, NDQ, 5 pin (https://www.ti.com/lit/ml/mmsf022/mmsf022.pdf TO-PMOD-11 11-pin switching regulator package, http://www.ti.com/lit/ml/mmsf025/mmsf025.pdf Vishay PowerPAK SC70 dual transistor package http://www.vishay.com/docs/70486/70486.pdf TO-46-4 with Valox case, based on https://www.schmitzbits.de/ms20.html which is good practice, but ho-dang what a mess romps with traces, vias, and net links 06eccf7d9c added the once through idea with commentary by Correcting changed filename in .prl 54f1a61ba5 gets jiggy with PCB locator, 3 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator JST PH series connector, B04B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator connector TE MATE-N-LOK side entry connector harwin ltek M80 Harwin LTek Connector.

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