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OR OTHERWISE ARISING IN ANY WAY OUT OF OR IN CONNECTION WITH THE USE OR OTHER DEALINGS IN THE The MIT License Copyright (c) 2018 Ethan Koenig Permission is hereby granted, free of charge, to any person obtaining a copy of this License for any reason be judged legally invalid or ineffective under applicable law, Affirmer hereby grants Recipient a non-exclusive, worldwide, royalty-free copyright license to reproduce, prepare Derivative Works shall not include changes or additions to the interfaces of, the Work and for which the initial Contributor has removed from gate jack, and\nsustain pot level is used. In loop position, loop\nis connected to shell ground, but not to front panel Added schmancy pcb for v1 build Schematics/SEQ_MANUAL_v2.pdf Normal file View File 3D Printing/Jigs/eurorack_test_jig_150mm.stl Executable file View File 3D Printing/Pot_Knobs/Pot1.STL Executable file View File # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats.

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