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B16B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator Hirose DF13 through hole, DF11-12DP-2DSA, 6 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator ipc_noLead_generator.py DDB Package; 12-Lead Plastic DFN (5mm x 5mm) (see Linear Technology DFN_6_05-08-1703.pdf 6-Lead Plastic Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/84299/vor1142b4.pdf SSO Stretched SO SOIC Pitch 2.54 SSO Stretched SO SOIC 2.54 8-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_16_05-08-1709.pdf DHC Package; 16-Lead Plastic Shrink.

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