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Quentin' Latest commits for file Images/precadsr-panel-holes.png 972d8b1e07 adds front panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane on only one.

• Cool 88, https://www.onsemi.com/pub/Collateral/FDMT80080DC-D.pdf TO-50-4.
• Diameter 40mm Electrolytic Capacitor.

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