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Connector, 14110413001xxx (https://b2b.harting.com/files/download/PRD/PDF_TS/1411XX13001XXX_100228421DRW046C.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py 10-Lead Plastic Dual Flat No-Lead Package, 3x3mm Body (see Atmel Appnote 8826 10-Lead Plastic DFN (3mm x 2mm) (see Linear Technology 05081707_A_DHD16.pdf DH Package; 16-Lead Plastic DFN (6mm x 5mm) (see Linear Technology DFN_8_05-08-1702.pdf 8-Lead Plastic Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf SSO Stretched SO SOIC Pitch 1.27 SSOP-8 2.9 x2.8mm Pitch 0.65mm SSOP-8 2.95x2.8mm Pitch 0.65mm Slug Up (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf HSOP, 32 Pin (JEDEC MS-013AF, https://www.analog.com/media/en/package-pcb-resources/package/54614177245586rw_14.pdf), generated with kicad-footprint-generator Tantalum Capacitor SMD Kemet-E (7360-38 Metric), IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55932-0510, with PCB trace layout Checkpoint in case of crashes Fix getting a bunch of wires backwards Fix floating pin for op amp style (thickness 0.15) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0) keep_text_aligned Add control label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane on only one cross-board wire that shouldn't be so hard. In general, try to avoid putting any UX.

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