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43160-2102, With thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/ Infineon SO package 20pin with exposed pad - Ref http://pdfserv.maximintegrated.com/land_patterns/90-0349.PDF DFN, 10 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001725D.pdf (Page 9)), generated with kicad-footprint-generator Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-10A, example for new mpn: 39-29-4169, 8 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog⟨=en&documentid=D31688_en), generated with kicad-footprint-generator JST XA series connector, LY20-36P-DLT1, 18 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator JST PHD horizontal JST SHL series connector, B12B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28, http://www.ti.com/lit/ml/msoi002j/msoi002j.pdf), generated.

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