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BackRailHeight = (threeUHeight-panelOuterHeight)/2; mountSurfaceHeight = (panelOuterHeight-panelInnerHeight-railHeight*2)/2; hp=5.08; mountHoleDiameter = 3.2; mountHoleRad =mountHoleDiameter/2; hwCubeWidth = holeWidth-mountHoleDiameter; offsetToMountHoleCenterY=mountSurfaceHeight/2; offsetToMountHoleCenterX=hp;//1hp margin on each Could replace step IDs with a diode matrix to select segments from each step. Binary files /dev/null and b/Docs/precadsr.pdf differ Binary files a/Schematics/Fireball_VCO.pdf and b/Schematics/Fireball_VCO.pdf differ b11a8d3187 Go to file 74231bd333 Port in fixes from v1.0 (the one that went to the schematic is incorrect Ins: Clock In - ~27K to U3-8? No, transistors maybe activate? Clock Out - 1K to TP5 Gate Out - 1K to TP5 Gate Out - 1K to TP5 Latest commits for file Examples/EG_MANUAL.pdf schematic start, and some example modules 811ef45c764021f623b8bb59234df1314fce4e91 12V, -12V and ground needed, probably up to 1amp