3
1
Back

Page size to 9mm and align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4, fix pots being backwards, tighten up schematic, fit letter instead of A4 More cleanup Schematics/Fireball.kicad_sch | 400 (50 "User.1" user (51 "User.2" user (52 "User.3" user (53 "User.4" user (54 "User.5" user (55 "User.6" user (56 "User.7" user (57 "User.8" user (58 "User.9" user Component Count: 76 Refs C2, C5, C6, C8, C9 | 4 .../PCB/precadsr_aux_Gerbers/precadsr-PTH.drl | 22 Panels/title_test.stl | Bin 0 -> 1303306 bytes Panels/FireballSpellVertSmall.png | Bin QuentinEF.ttf => Panels/QuentinEF.ttf | Bin 0 -> 140153 bytes create.

New Pull Request