Labels Milestones
BackB.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: unplated through holes: merged pull request 'Put title box in PDF export' (#4) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 Generated from schematic into main ... Add jlc constraints DRC; replace order number text Add jlc constraints DRC.
- Last 5 notes of what.
- -1.165816e-14 -1.000000e+00 6.113595e-15 facet normal 0.000000e+00 0.000000e+00 1.000000e+00.
- Vertex 2.813232e+000 -3.197688e+000 2.491820e+001 facet normal.
- Normal 9.801131e-01 2.657016e-03 1.984220e-01 facet normal -0.290276 -0.956943.