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Out 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane Latest commits for file Examples/EG_MANUAL.pdf schematic start, and some example modules f80e4975fb checkpoint before getting really weird with WireIt A couple more minor clearance tweaks 68726f9fe0 Delete '3D Printing/Panels/FIREBALL VCO.png' 3D Printing/Panels/FIREBALL.

• Normal -9.013511e-01 -1.491429e-03 4.330867e-01 facet normal -0.152472 0.0366121.
• OTHERWISE STATED IN WRITING.
• Normal 8.477229e-01 3.604418e-03 5.304271e-01 facet.
• Panels/luther_triangle_vco.scad | 274 create mode 100644.

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