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BackPitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=305, NSMD pad definition Appendix A BGA 1760 1 FF1761 FFG1761 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=300, NSMD pad definition Appendix A BGA 238 0.5 CP236 CPG236 Artix-7 BGA, 19x19 grid, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=267, NSMD pad definition Appendix A Zynq-7000 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=270, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, VQFN-HR RNN0018A (http://www.ti.com/lit/ds/symlink/tps568215.pdf QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ina3221.pdf#page=44), generated with kicad-footprint-generator JST PH series connector, SM07B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55932-1210, with PCB trace layout 4efd2875e8 Replaced accidentally dropped Fine tuning hole. Am totally not using git correctly Latest commits for file Schematics/SynthMages.pretty/Perfboard_2x12.kicad_mod Latest commits for file Images/PXL_20210831_000949090.jpg 2cb8e5eaf6 Go to file Open with Intellij IDEA f33ea6a168 Add scad for v3.2 panel_tweaking Notes about component heights, swapping rotary and toggle switches From 8976a63dc06fa25beedf8d2553931872c491047e Mon Sep 17 00:00:00 2001 Subject: [PATCH 10/13] glide fix Notes from MK's PCB livestream 3afa35e4b1 PCB initial layout, no traces }, More tweaks after pro review "multiple_net_names": "warning", "net_not_bus_member": "warning", "no_connect_connected": "warning", "no_connect_dangling": "warning", "pin_not_connected": "error", "pin_not_driven": "error", "pin_to_pin": "warning", "power_pin_not_driven": "error", "similar_labels": "warning", More tweaks after pro review "design_settings": { "defaults": { PCB initial layout, no traces "min_copper_edge_clearance": 0.0, PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups d7370bb10c Add tl074 datasheet/pinout Datasheets/tl074-pinout.jpeg | Bin 0 -> 30552 bytes From b284a71188b23f9f8c43bee1fcce2820249f4384 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Added input resistor for sync; placed everything on PCB Checkpoint after re-centering sliders, before removing redundant LED resistors Checkpoint after converting most things to SMD From 054c37512afd84e9f4dd43316902a76ae73fd917 Mon Sep 17 00:00:00 2001 .../Panels/MAGIC MOUTH.png | Bin 0 -> 69774 bytes Images/precadsr-panel-art.png | Bin QuentinEF.ttf => Panels/QuentinEF.ttf | Bin 139972 -> 140153 bytes main MK_VCO/Schematics/MK_VCO_RADIO_SHAEK.diy 5515 lines 2bd01a1ff2 Add schematic, start on PCB with.
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