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Back*-save.pro *-save.kicad_pcb fp-info-cache *.lck # Netlist files (exported from Eeschema) *.net # Autorouter files (exported from Eeschema # Autorouter files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: unplated through holes: ============================================================= bacdac34d747275148c56e8293dc209c2e326fe4 2d3c489f2acf0f8bdc9cf0fe8c2346d4d07472be More SR1 notation SR 1.pdf Normal file View File Find and replace last few thin traces, fix teardrops and gnd fill Find and replace last few thin traces, fix teardrops and gnd fill f63cfba954 Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation Add 55k-ish resistor to coarse knob to fix tuning.
- 7.26455 7.25222 vertex 1 6.34847 12.858 vertex 1.
- (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf7032_en.pdf Inductor, TDK, SLF12555.
- Connect Type059_RT06304HBWC, 4 pins, pitch 2.54mm, drill.