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Back1.403x1.555mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf WLCSP-36, 6x6 raster, 2.5x2.5mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.65mm VFBGA-86, 6.0x6.0mm, 86 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00282249.pdf WLCSP-90, 10x9 raster, 4.223x3.969mm package, pitch 0.8mm Altera BGA-68 M68 MBGA Altera BGA-153 M153 MBGA Altera VBGA V81 BGA-81 Altera BGA-100 M100 MBGA 121-ball, 0.8mm BGA (based on http://www.latticesemi.com/view_document?document_id=213 Lattice caBGA-756, ECP5 FPGAs, 27.0x27.0mm, 756 Ball, 32x32 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=23 FBGA-96, 13.5x7.5mm, 96 Ball, 9x16 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=26 ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://assets.nexperia.com/documents/data-sheet/PCMFXUSB3S_SER.pdf ST WLCSP-18, ST Die ID 466, 1.86x2.14mm, 18 Ball, X-staggered 7x5 Layout, 0.4mm Pitch, https://assets.nexperia.com/documents/data-sheet/PCMFXUSB3S_SER.pdf ST WLCSP-18, ST Die ID 466, 1.86x2.14mm, 18 Ball, X-staggered 7x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g031y8.pdf ST WLCSP-20, ST die ID 471, 4.437x4.456mm, 100 Ball, 10x10 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF NXP VFBGA-42, 3.0x2.6mm, 42 Ball, 6x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g0b1ne.pdf#page=136 ST WLCSP-64, ST die ID 456, 1.94x2.4mm, 20 Ball, 4x5 Layout, 0.4mm Pitch, https://www.ti.com/lit/ml/mxbg419/mxbg419.pdf, https://www.ti.com/lit/ds/symlink/tmp117.pdf Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition Appendix A Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=292, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=88, NSMD pad definition (http://www.ti.com/lit/ds/symlink/ts5a3159a.pdf Texas Instruments BGA-289, 0.4mm pad, based on (or derived from) the Work under terms of the program. // Align a face is not included in repo main dd8fda85b1 Update README.md 32ece2d681b26731bad50902587b988d6a79e43e updated README.md updated C14 footprint, traces, groundplane updated C5 footprint & tracing; schematic annotation Add 55k-ish resistor to coarse knob to fix tuning range Add 55k-ish resistor to coarse knob to fix this and turn it into a solid square wave. Easiest bodge on the rails v_wall(h=4, l=height-rail_clearance*2-thickness, th=thickness*1.25); v_wall(h=4, l=height-rail_clearance*2, th=right_rib_thickness); // top horizontal rib h_wall(h=4, l=right_rib_x); // one more vertical to mount the circuit board to, dead center pcb_holder(h=10, l=top_row-rail_clearance*2, th=1.15, wall_thickness=1); // lower h-rib reinforcer ## Photos [to be added] ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf ## Git repository https://gitlab.com/rsholmes/precadsr PSU/Synth Mages Power Word Stun.kicad_prl 78 lines if ($bread) { $bread_page_url = $bread->getAttribute('href'); $xpath = $this->get_xpath_dealie($article['link']); $article['content'] = $this->get_img_tags($xpath, '(//div[@class="webcomic-image"]//img)', $article); } // draws two walls in parallel, close together so a PCB can fit between } module title(string, size=12, halign="center", font=font_for_title.
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