Ref="J7" pin="2"/> main MK_VCO/Fireball/Fireball_panel.kicad_pro 505 lines { "board": { updates led holes to 5mm + unplated, and revises jack footprint 16c50fa0a8 Add pulldown resistors for reset debounce cap; formatting checkpoint before getting really weird with WireIt dd8c61c34f A couple more minor clearance tweaks couple more GND-stitch vias Undo converting GND to GND_JMP and fix everything that broke 3583986e89 Finished PCB, passes all passable DRCs created pull request synth_mages/MK_VCO#1 32ded0979b Fix rail clearance issues, make all power traces large Added input resistor for sync; placed everything on PCB with on-board components Add correct footprints to fireball From e9734fb673e2df8488e62f7bd94252034b048666 Mon Sep 17 00:00:00 2001 Subject: [PATCH 09/13] Notes from debugging Latest commits for file Panels/FireballSpell_Large_bw.png.svg Latest commits for file Synth Mages Power Word Stun.kicad_prl | 4 | 100nF | Unpolarized capacitor | | J7 | 1 | 2_pin_Molex_header .