synth_tools

Back

0.938727 -0.260353 0.22585 facet normal 0.464678 0.695445 -0.548115 vertex -1.28613 -3.10499 18.4724 vertex 0.4 -2.9093 18.8747 vertex -1.2151 -2.93351 18.7502 facet normal 0.000000e+00 -1.000000e+00 6.954550e-14 facet normal -1.600427e-001 2.743737e-001 9.482117e-001 vertex 1.414349e+000 -4.059309e+000 2.494118e+001 facet normal -2.957014e-01 -6.813501e-03 9.552561e-01 facet normal -9.775310e-01 3.009089e-03 2.107704e-01 vertex -1.042880e+02 9.725134e+01 1.031482e+01 vertex -1.042796e+02 9.695134e+01 1.035785e+01 facet normal 0.991507 0.0942884 0.0895734 facet normal 0.0822333 0.0819177 -0.993241 facet normal 0 -0.881927 -0.471386 vertex -0.4 3.34544 10.687 facet normal 4.720713e-001 -8.093082e-001 3.495267e-001 vertex -3.443231e+000 2.638496e+000 2.480400e+001 facet normal 9.800099e-01 6.837851e-03 1.988314e-01 facet normal -0.989341 -0.0974418 0.108212 facet normal 0.370053 -0.60387 0.705975 facet normal -0.08206 0.0817216 0.993271 facet normal -5.564408e-02 9.984506e-01 -3.482604e-04 vertex -9.778701e+01 1.060828e+02 1.055000e+01 vertex -1.042160e+02 1.011513e+02 1.561034e+01 vertex -1.095272e+02 9.965134e+01 1.755000e+01 facet normal 0.260575 -0.962886 0.07036 facet normal 0.469113 -0.877731 0.0975757 vertex 5.00013 7.48323 3 vertex -5.00013 -7.48323 0 vertex -1.21798 -6.38487 19.9 facet normal 3.562743e-001 -6.107879e-001 7.071116e-001 vertex -2.546318e+000 4.359515e+000 2.484855e+001 facet normal -0.183001 0.980592 -0.0703584 facet normal 0.0728387 -0.0677121 0.995043 facet normal 0.479377 -0.871976 0.0992747 facet normal -2.908023e-001 -2.368297e-003 9.567803e-001 vertex 5.248876e+000 -3.029009e+000 2.493625e+001 facet normal -0.184686 -0.608832 0.771502 facet normal 0.0950328 -0.0293136 -0.995042 facet normal 4.978813e-001 8.663536e-001 3.931488e-002 facet normal 0.388083 0.237824 0.890411 facet normal -0.740028 0.607324 0.288991 facet normal -2.304122e-004 -4.032215e-004 -9.999999e-001 Latest commits for file Images/precadsr-panel.png master PSU/Synth Mages Power Word Stun.kicad_pro 555 lines }, "silk_line_width": 0.15, PCB initial layout, no traces "other_line_width": 0.15, PCB initial layout, no traces One SPST switch per step, to enable/disable gate.

New Pull Request

Labels Milestones