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Back# For PCBs designed using KiCad: http://www.kicad-pcb.org/ # Format documentation: https://kicad.org/help/file-formats/ # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *-backups */fp-info-cache *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Pcbnew # Exported BOM files *.xml *.csv # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated.
- 7.696929e-001 2.488700e+001 facet normal -0.15247 -0.036616 0.98763 vertex.
- Length*width=30.479999999999997*15.239999999999998mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf L_CommonMode_Toroid Vertical series.