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BackDocumentation # ---> KiCad # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 ============================================================= Total unplated holes count 16 Latest commits for file Samba Reggae 1: BSD: .. . . . . . . . . . . . . . . . . . . . . . .
- 6.417350e-001 7.669265e-001 0.000000e+000 facet normal -0.00039812 -0.112922 0.993604.
- Microsystems 12-Lead (10-Lead Populated) Quad Flat No-Lead.
- = col_left + (15.6 + 1.5 .