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Href="https://gitea.circuitlocution.com/synth_mages/synth_tools/commit/5bb1bd5c88bf6114890ca8bf3b2e363c3a3ad015">5bb1bd5c88bf6114890ca8bf3b2e363c3a3ad015 Change transistor footprint to inline_wide, fix DRC ground plane Binary files a/3D Printing/Panels/image.png and /dev/null differ main MK_VCO/Fireball/Fireball.kicad_pcb 35767 lines da12ac6a39 Delete '3D Printing/Panels/FIREBALL VCO.png' da12ac6a39 Delete '3D Printing/Panels/FIREBALL VCO.png' # precadsr.sch BOM Mon 19 Apr 2021 10:22:18 AM EDT Generated from schematic into main Merge pull request 'pcb_finalization' (#1) from bugfix/10hp into main ... Schematics/Fireball_VCO.pdf Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Arduino_Nano.kicad_mod Normal file View File main precadsr/Docs/precadsr_bom.md 59 lines Latest commits for file Schematics/SynthMages.pretty/Perfboard_1x12.kicad_mod # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *.kicad_prl *.kicad_pro *.rules *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: merged pull request 'Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 Generated from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 Generated from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 **Component Count:** 75 **Component Count:** 75 0 0 Y N 2 F N DEF SW_Coded_SH-7080 SW 0 40 Y N 1 F N DEF SW_DIP_x08 SW 0 20 Y N 1 F N DEF SW_SPST_LED SW 0 40 Y N 1 F N DEF Kosmo_panel_Led_Hole H 0 40 Y Y 1 F N DEF SW_DPST_Temperature SW 0 20 Y N 2 F N DEF SW_Rotary2x6 SW 0 40 Y N 1 F N DEF SW_DIP_x09 SW 0 40 Y N 1 F N DEF Vactrol U 0 40 Y Y 1 F N DEF SW_SPST_Lamp SW 0 0 N N 1 F N DEF SW_SP3T SW 0 0 Sequencer based on SIP7, http://power.murata.com/data/power/ncl/kdc_nma.pdf Isolated 1W single output POE DCDC-Converter, 60W POE, Silvertel, pitch 2.54mm, package size 32.2x9.1x15mm^3, https://www.recom-power.com/pdf/Innoline/R-5xxxPA_DA.pdf RPA60-FW 60W Isolated DC to DC Converters dc-dc recom buck sip-12 pitch 2.54mm length 5.3mm diameter 2.2mm Vishay IM-1 Inductor, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*15mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf CP Radial series Radial pin pitch 20.07mm diameter 27.9mm Vishay IHB-3 Inductor, Radial series, Radial, pin pitch=2.50mm, , diameter=6.3mm, Electrolytic Capacitor CP, Radial_Tantal series, Radial, pin pitch=5.00mm 7.50mm, , length*width=10*5mm^2, Capacitor C Rect series Radial pin pitch 15.00mm length 19mm width 6mm Capacitor C, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*width=21.59*11.43mm^2, Pulse, KM-3, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf L_Toroid Vertical series Radial pin pitch 7.50mm length 10.3mm width 4.5mm Capacitor C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*5.7mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf C Rect series Radial pin.

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