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Thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf HTSSOP, 16 Pin (https://www.stcmicro.com/datasheet/STC15F2K60S2-en.pdf#page=156), generated with kicad-footprint-generator ipc_gullwing_generator.py TSSOP, 36 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/36L_QFN_6x6_with_3_7x3_7_EP_Punch_Dimpled_4E_C04-0241A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DDB Package; 10-Lead Plastic DFN (4mm x 4mm) (see Linear Technology DFN_16_05-08-1706.pdf DHD Package; 18-Lead Plastic DFN (5mm x 4mm) (see Linear Technology DFN_16_05-08-1709.pdf DHC Package; 18-Lead Plastic DFN (3mm x 2mm) 0.40mm pitch DDB Package; 8-Lead Plastic Dual Flat, No Lead Package, 3.3x3.3x0.8mm Body, https://www.diodes.com/assets/Package-Files/PowerDI3333-8.pdf Fairchild Power33 MOSFET package, 3x3mm (see https://www.fairchildsemi.com/datasheets/FD/FDMC8032L.pdf Fairchild-specific MicroPak-6 1.0x1.45mm Pitch 0.5mm SON, 8-Leads, Body 5x6x1mm, Pitch 1.27mm; (see Texas Instruments EUS 5 Pin Double Sided Module 16-pin module, column spacing 22.86 mm (900 mils THT DIP DIL ZIF 10.16mm 400mil SMDSocket SmallPads 4-lead though-hole mounted DIP package, row spacing 9.53 mm (375 mils), Clearance8mm 22-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), see https://www.vishay.com/docs/91361/hexdip.pdf.

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