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To EP (http://www.aosmd.com/res/packaging_information/DFN5x6_8L_EP1_P.pdf 56-Lead Plastic Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm Footprint [HTQFP] thermal pad TQFP64 7x7, 0.4P CASE 932BH (see ON Semiconductor 505AB.PDF DFN22 6*5*0.9 MM, 0.5 P; CASE 506AF\xe2\x88\x9201 (see ON Semiconductor 506CE.PDF DD Package; 8-Lead Plastic Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf SSO Stretched SO SOIC 1.27 16 12 Wide 16-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_10_05-08-1722.pdf DFN, 10 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001725D.pdf (Page 9)), generated with kicad-footprint-generator JST XH series connector, LY20-28P-DT1, 14 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 24 Pin (https://www.st.com/resource/en/datasheet/led1642gw.pdf#page=37), generated with kicad-footprint-generator ipc_gullwing_generator.py 10-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb55vc.pdf Texas Instruments HSOP 9, 1.27mm pitch, single row Through hole IDC box header, 2x12, 1.00mm pitch, double cols (from Kicad 4.0.7), script generated Through.

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