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From 9f0e0a275be19d54acb7a510415f15c04cb49983 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Apply jlcpcb's design rules, small fixes for those 972e45fb78 Go to file 6523065365 updates the potentiometer pads and thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf 20-Lead Plastic Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm Footprint [HTQFP] thermal pad (http://www.analog.com/media/en/technical-documentation/data-sheets/AD9852.pdf 80-Lead Plastic Thin Quad Flatpack (PT) - 7x7x1.0 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf 20-Lead Plastic Shrink Small Outline Narrow Body (QR)-.150" Body [QSOP] (see Microchip Packaging Specification 00000049BS.pdf DFN, 6 Pin (https://www.nxp.com/docs/en/package-information/SOT457.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 6 Pin (https://www.renesas.com/us/en/document/psc/package-drawing-hodfn-6pin-l615x16?language=en&r=568376 Miniature Crystal Clock Oscillator IQXO-70, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 5.0x3.2mm^2 package Abracon.

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