3
1
Back

(https://www.jedec.org/sites/default/files/docs/Mo-178D.PDF inferred 3-pin variant), generated with kicad-footprint-generator ipc_noLead_generator.py LFCSP, 16 Pin (https://ww1.microchip.com/downloads/en/DeviceDoc/16L_VQFN-WFS_3x3mm_4MX_C04-00508a.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py 10-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_16_05-08-1706.pdf DHD Package; 16-Lead Plastic Small Outline Narrow Body (QR)-.150" Body [QSOP] (http://www.allegromicro.com/~/media/Files/Datasheets/ACS726-Datasheet.ashx?la=en Allegro Microsystems 12-Lead (10-Lead Populated) Quad Flat No-Lead Package, Body 4.4x6.5x1.1mm, Pad 3.0x4.2mm, Texas Instruments DSBGA BGA YFF S-XBGA-N5 Texas Instruments, DSBGA, area grid, YBG pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.35mm Pitch, http://www.latticesemi.com/view_document?document_id=213 WLCSP-16 2.225x2.17mm, 2.17x2.225mm, 16 Ball, 4x4 Layout, 0.5mm Pitch, https://www.adestotech.com/wp-content/uploads/AT25SL321_112.pdf#page=75 WLCSP 12 1.56x1.56 https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMM150-DS001-01.pdf WLCSP-12, 6x4 raster staggered array, 1.403x1.555mm package, pitch 0.5mm UFBGA-64, 8x8 raster, 5x5mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32f042k6.pdf WLCSP-36, 6x6 raster, 2.61x2.88mm package, pitch 0.4mm; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf Texas Instruments, DSBGA-6, 0.704x1.054mm, NSMD, YKA pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF, https://pdfserv.maximintegrated.com/package_dwgs/21-100302.PDF NXP VFBGA-42, 3.0x2.6mm, 42 Ball, 6x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g483me.pdf ST WLCSP-81, ST die.

New Pull Request