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To add hard sync to schematic, laid out PCB with exploratory 8hp layout Bring in diylc and openscad design main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_dru Largest size No.

JST SFH horizontal JST.
Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00476-02.pdf), generated with kicad-footprint-generator connector Molex Mini-Fit_Sr.
6.246918e-001 vertex 3.465027e+000 2.690868e+000 2.484855e+001.

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