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Period: 1 day 1 year Overview 0 Active Pull Requests revised README.md to rev 2 beta by adding +5V, and both trigger/gate and CV routing f12031bb4117bdc0bfa93734f5e1f978a14297b0 edits README.md file again 8976a63dc0 edits README.md file 4f6e9e0984 Updated LICD, alter alt-textify to handle weaker (<6v) signals - Clock In - U1-13.

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