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Back"Layer F.SilkS" "Notes": "Layer F.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 16 ============================================================= Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File Images/loop.png Normal file View File 3D Printing/Pot_Knobs/18-spline-pot-knob-indicator-line.stl Executable file View File Panels/title_test_36.stl Normal file View File 3D Printing/Cases/Eurorack 2-Row/rail_profile.scad Executable file View File MK_VCO_RADIO_SHAEK_try2_ground_rail.diy Executable file View File main precadsr/.gitignore 58 lines # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *-backups *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # Netlist files (exported from Eeschema) *.net # Autorouter files (exported from Eeschema # Autorouter files (exported from Eeschema) *.net # Autorouter files (exported from Pcbnew # Exported BOM files *.xml *.csv # KiCad backups folders Hardware/PCB/precadsr/precadsr.kicad_pro Normal.
- -0.00124902 0.993309 vertex -7.11659 -1.0528.
- Vertex -9.051964e+01 1.005513e+02 1.156263e+01 vertex.