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Size to 9mm and align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane Latest commits for branch pcb_finalization re-re-remove the mysterious extra trace Binary files /dev/null and b/Hardware/Panel/precadsr_panel.png differ Cell (black box KASSU / AO

• 0.526063 0.586349 vertex 6.27392 1.68379.
• Wire terminal Samtec Micro Mate Discrete.

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