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Single and Dual Output, 1500VDC Isolation, 24.0x13.7x8.0mm https://www.artesyn.com/power/assets/ata_series_ds_01apr2015_79c25814fd.pdf https://www.artesyn.com/power/assets/trn_dc-dc_ata_3w_series_releas1430412818_techref.pdf DCDC-Converter, BOTHHAND, Type CFxxxx-Serie, (Very dodgy url but was the only at hand), DCDC-Converter BOTHHAND Type CFxxxx-Serie DCDC-Converter, CINCON, EC5BExx, 18-36VDC to dual output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/B%20CASE/SPEC-EC5BE-V24.pdf DCDC-Converter CINCON EC5BExx 18-36VDC to dual output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/B%20CASE/SPEC-EC5BE-V24.pdf DCDC-Converter CINCON EC6Cxx single output DC/DC Murata MGJ2DxxxxxxSC, 19.5x9.8x12.5mm, 5.2kVDC Isolated, 1W, dual output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/B%20CASE/SPEC-EC5BE-V24.pdf DCDC-Converter CINCON EC6Cxx single output POE DCDC-Converter TRACO TMR1-xxxx Dual_output DCDC-Converter, TRACO, TSR 1-xxxx XP_POWER IA48xxD, DIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DFN, 6 Pin (https://www.onsemi.com/pdf/datasheet/ncp349-d.pdf#page=12), generated with kicad-footprint-generator JST J2100 series connector, 14110613010xxx (https://b2b.harting.com/files/download/PRD/PDF_TS/1411XX13010XXX_100228421DRW063C.pdf), generated with kicad-footprint-generator JST VH series connector, B14B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator Tantalum Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator Diode SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 2.21mm, 1 to set output voltages. (10 One potentiometer per step, to set output voltages. (10) One potentiometer for internal clock rate. - One SPST switch per step, to enable/disable gate per step. (10 Momentary-normal-off pushbutton to manually step. - SPST switch to disable reset (run once). - Momentary-normal-off pushbutton to manually reset. More repo cleanup, adopt github .gitignore file 33729ec97f6dd2ed68c4ca06088ce0b21651948d Align panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane Latest commits for branch panel_tweaking Add scad for v3.2 f33ea6a168329cd0061e01c376cbd377f46ddc60 @circuitlocution.com created pull request 'new_footprints' (#5) from new_footprints into main v1 Final tweaks, version submitted to JLCPCB on 20240124 Experimenting with more panel layout } Experimenting with more panel layout ideas working_height = height - v_margin - title_font_size*1.5; top_row = height - v_margin - title_font_size*1.5; top_row = height - v_margin; working_increment = working_height / (8+tolerance/3); // generally-useful spacing amount for vertical columns of stuff col_left = h_margin; bottom_row = v_margin + 12; row_2 = row_1 + v_margin + 12; title_font = 10; // [1:1:84] width = 24; .

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