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Back(j1/j13 // gate out (j4/j10 // clock out (j5/j12) // glide in (sleeve and normal both GND 6x Sockets, 2pin: Gate out (could normal to Reset In - ~27K to U3-8? No, transistors maybe activate? Outs: Clock Out - Diode from rotary pin 13? CV Out - 1K to TP5 Latest commits for file Schematics/schematic_bugs_v1.md Update Schematics/schematic_bugs_v1.md Schematics/schematic_bugs_v1.md | 1 | TL071 | Operational amplifier, DIP-8 From 1705ad98fb4243c88ad227e3cad9c42bb94c7269 Mon Sep 17 00:00:00 2001 Subject: [PATCH 08/13] More notes Schematics/schematic_bugs_v1.txt | 2 aoKicad | 2 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1.
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