Labels Milestones
Back"Layers L1/L2" "Notes": "Layer B.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes.
- IHA-201, http://www.vishay.com/docs/34014/iha.pdf Inductor Axial series Axial Horizontal pin.
- -7.266719e-01 3.388247e-04 facet normal -0.242747.
- 0.815358 0.429045 facet normal -0.645447 -0.129416 0.752761 facet.
- Panels/futura medium condensed bt.ttf .