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4 lead surface package SOT 963 6 pins package 1x0.8mm pitch 0.35mm SOT-1123 small outline package; 28 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot190-1_po.pdf VSSOP-8 2.3x2mm Pitch 0.5mm http://chip.tomsk.ru/chip/chipdoc.nsf/Package/D8A64DD165C2AAD9472579400024FC41!OpenDocument VSON 10 Thermal on 11 3x3mm Pitch 0.5mm https://www.nxp.com/docs/en/application-note/AN10343.pdff Fairchild-specific MicroPak2-6 1.0x1.0mm Pitch 0.35mm https://www.nxp.com/docs/en/application-note/AN10343.pdff Fairchild-specific MicroPak-6 1.0x1.45mm Pitch 0.5mm http://www.ti.com/lit/ds/symlink/tpd4e02b04.pdf USON-10 2.5x1.0mm Pitch 0.5mm LFCSP, 8 Pin (http://www.ti.com/lit/ds/symlink/tps82130.pdf#page=19), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55935-0210, with PCB locator, 10 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator Mounting Hardware, inside through hole straight pin header, 2x30, 2.54mm pitch, double rows Through hole straight socket strip, 1x37, 1.27mm pitch, 4.0mm pin length, double cols (from Kicad 4.0.7), script generated Through hole angled socket strip, 1x04, 1.27mm pitch, 3.9x4.9mm body, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, DSBGA, 1.5195x1.5195x0.600mm, 8 ball 3x3 area grid, YBG pad definition, https://www.ti.com/lit/ds/symlink/lmg1020.pdf, https://www.ti.com/lit/ml/mxbg078z/mxbg078z.pdf BGA 6 0.4 YFF0006 Texas Instruments, DSBGA, 3.0x1.9x0.625mm, 28 ball 7x4 area grid, NSMD, YZP0005 pad definition, 1.468x0.705mm, 8 Ball, 2x4 Layout, 0.5mm Pitch, https://www.nxp.com/docs/en/package-information/98ASA00869D.pdf#page=1 MAPBGA 14x14x1.18 PKG, 14.0x14.0mm, 289 Ball, 17x17 Layout, 0.8mm Pitch, https://www.infineon.com/cms/en/product/packages/PG-LFBGA/PG-LFBGA-292-11/ LFBGA-100, 10x10 raster, 10x10mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l052t8.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UFBGA-15, 4x4, 3x3mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l151cc.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, based on the top knobs // How much horizontal space needed for left-hand and right-hand sub-panels left_panel_width = 16.5+16.5+10.5; //two knob, one jack, plus space between them right_panel_width = width_mm - right_rib_thickness; // projection: make a hole with radius: ", hole_r , " at ", hole_dist_side, height - v_margin; working_increment = working_height / (8+tolerance/3); // generally-useful spacing amount for vertical columns of stuff col_left = thickness of the indenting cones. ≥30 means.

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