3
1
Back

Bump 2x3 (perimeter) array, NSMD pad definition, 1.468x0.705mm, 8 Ball, 2x4 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l4p5ve.pdf ST WLCSP-115, ST die ID 483, 3.73x4.15mm, 115 Ball, Y-staggered 11x21 Layout, 0.35mm Pitch, https://www.st.com/resource/en/datasheet/stm32h747xi.pdf DFN, 6 Pin (https://www.diodes.com/assets/Package-Files/U-DFN2020-6%20(Type%20C).pdf), generated with kicad-footprint-generator connector JST EH series connector, 14111213002xxx (https://b2b.harting.com/files/download/PRD/PDF_TS/1411XX13002XXX_100228421DRW035C.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py 4-Lead Plastic Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf SSO Stretched SO SOIC Pitch 2.54 SSO Stretched SO SOIC 1.27 SSO, 7 Pin Double Sided Module Texas Instruments EUS 5 Pin Double Sided Module Texas Instruments DSBGA BGA YZR0009 Texas Instruments, DSBGA, 3.0x1.9x0.625mm, 28 ball 7x4 area grid, NSMD pad definition Appendix A BGA 900 1 FB900 FBG900 FBV900 Kintex-7 and Zynq-7000 BGA, 22x22 grid, 23x23mm package.

New Pull Request