synth_tools

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And b/Schematics/Fireball_VCO.pdf differ b11a8d3187 Go to file b11a8d3187 Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4s d12ec1f19bbae8f01395e4c76a152d3d4ce7a3d4 Align panel to integer pseudo-origin, remove testing text, decrease title label font so we don't lose it Futura Heavy BT.ttf.

Normal 2.890016e-001 -4.954576e-001 8.191458e-001 vertex -1.678976e+000.
1.087044e-001 4.839895e-004 9.940740e-001 vertex -4.210863e+000 7.691713e-001 2.495526e+001 facet.
*.kicad_prl *.kicad_pro *.rules *.sch-bak .
-3.694615e-15 -4.690112e-15 1.000000e+00 facet normal -0.111545 -0.367721.

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