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Vias and counter-pad, see http://www.ti.com/lit/ds/symlink/tps62177.pdf WSON 0.5 thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py WSON, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_TDFN_2x3_MNY_C04-0129E-MNY.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 42 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081875_0_UHE42.pdf), generated with kicad-footprint-generator Hirose DF12C SMD, DF12C3.0-30DS-0.5V, 30 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing⟨=en&documentid=0000992393), generated with kicad-footprint-generator Harting har-flexicon series connector, B4B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator Mounting Hardware, inside through hole ST Morpho Connector 144 With STLink ST Morpho Connector 144 STLink AI accelerated MCU with optional wifi, https://dl.sipeed.com/MAIX/HDK/Sipeed-M1&M1W/Specifications AI Kendryte K210 RISC-V Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, DSBGA, 0.9x1.4mm, 6 bump 2x3 (perimeter) array, NSMD pad definition Appendix A BGA 484 1 FB484 FBG484 FBV484 Artix-7, Kintex-7 and Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=306, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0102.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments HSOP 9, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated Surface mounted pin header THT 2x12 2.54mm double row surface-mounted straight socket strip, 1x05, 2.54mm pitch, double rows Surface mounted pin header THT 2x03 2.00mm double row Through hole socket strip THT 1x02 1.00mm.

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