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BackPanels/futura light bt.ttf differ From 2537badf2888da8d57706bf8be36ba8f10d4993a Mon Sep 17 00:00:00 2001 f6c7924538 Go to file 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane Updates from real TL0x4s Add note resulting from real TL0x4s d12ec1f19bbae8f01395e4c76a152d3d4ce7a3d4 More repo cleanup, adopt github .gitignore file f45c980890 Align panel to integer pseudo-origin, remove testing text, decrease title label font so we don't lose it 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/COLOR SPRAY.png Normal file View File Panels/futura light bt.ttf and /dev/null differ # 2-layer, 1oz copper condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type")) # 4-layer condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == A.Type && A.Net != B.Net" condition "A.Type == 'track' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'track' && B.Type == 'track'" (condition "A.isPlated() && B.Type == A.Type" (condition "A.Type == 'pad' && B.Type == 'track'" (condition "A.isPlated() && B.Type == A.Type")) # 4-layer condition "A.Type == 'track' && B.Type == 'track'" From f12031bb4117bdc0bfa93734f5e1f978a14297b0 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Optional capacitor socket # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *.kicad_prl *.kicad_pro *.rules *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # Netlist files (exported from Pcbnew) *.dsn *.ses New KiCad version; non Al panel Gerbers pts New KiCad version; non Al panel Gerbers .gitignore | 16 .../precadsr_aux_Gerbers/precadsr-F_Cu.gbr | 580 .../precadsr_aux_Gerbers/precadsr-F_Mask.gbr | 185 .../precadsr_aux_Gerbers/precadsr-F_Paste.gbr | 4 | | | | | C9 | 5 | 2N3904 | Small Signal NPN Transistor, TO-92"/>