Labels Milestones
BackHttp://www.st.com/resource/en/datasheet/stm32f091vb.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf WLCSP-36, 6x6 raster, 2.553x2.579mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf WLCSP-81, 9x9 raster, 3.693x3.815mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf Texas Instruments, DSBGA, 3.415x3.535x0.625mm, 64 ball 8x8 area grid, YZR pad definition Appendix A BGA 900 1 FF900 FFG900 FFV900 FF901 FFG901 FFV901 Artix-7, Kintex-7 and Zynq-7000 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=300, NSMD pad definition Appendix A Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=271, ttps://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=281, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=82, NSMD pad definition Appendix A BGA 900 1 FF900 FFG900 FFV900 FF901 FFG901 FFV901 Artix-7, Kintex-7 and Zynq-7000 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=79, NSMD pad definition (http://www.ti.com/lit/ds/symlink/opa330.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments EUS 5 Pin (https://www.jedec.org/sites/default/files/docs/MO-193D.pdf variant AB), generated with kicad-footprint-generator JST SH series connector, S13B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator JST XH series connector, B40B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SOP, 8 Pin (https://www.st.com/resource/en/datasheet/ld1086.pdf#page=35), generated with kicad-footprint-generator ipc_gullwing_generator.py DSO DSO-8 SOIC SOIC-8 Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf TDFN, 6 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_6_3.pdf), generated with kicad-footprint-generator Molex 734 Male header (for PCBs); Angled solder pin 1.
- -2.096583e-001 -3.669017e-001 9.063259e-001 vertex 1.698597e+000 4.963580e+000 2.491820e+001 facet.
- Rotary hex Real D Rotary switch, 4-bit.
- Vertex -0.573447 -6.50844 7.52902 facet normal 4.080706e-001 -6.992230e-001.
- PCB checkpoint after roughing.
- 2.932777e-003 7.524720e-001 facet normal 0.111504 -0.36774 0.92322 vertex.