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100644 Panels/luther_triangle_10hp.stl create mode 100644 Panels/futura light bt.ttf differ Binary files /dev/null and b/3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels' c58f541d7e93b3fa0676ab29736db865cc42ef96 Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin History e825437e5d Upload files to '3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/POLYMORPH.png create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CuBottom.gbl create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/analogoutput_12mm.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x10_P2.54mm_Vertical.kicad_mod delete mode 100644 3D Printing/Panels/SPIDER CLIMB.png | Bin 16700 -> 0 bytes Binary files /dev/null and b/Panels/luther_triangle_10hp.stl differ Binary files /dev/null and b/3D Printing/Rails/18hp_innie.stl differ Binary files /dev/null and b/3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin' 122134fc8e1c73b6bb86552323cca038dd4b5107 Binary files /dev/null and b/Schematics/bad_trace_v1.jpeg differ Panels/luther_triangle_vco_quentin_v4.scad Normal file View File 3D Printing/Cases/Eurorack Modular Case/DSC03766.JPG Executable file View File Schematics/SynthMages.pretty/Switch.dcm Normal file Unescape 500k Trimpot; tune to 1V out HALF Dot1 Dot2 Dot3 Dot4 Dot5 Dot6 Dot7 Dot8 Dot9 Dot10 Dot11 Dot12 Dot13 W1 L2 <-- CV In - ~27K to U3-8? No, transistors maybe activate? - Clock In - diode to U2-3 Glide In - diode to prevent z-fighting. Nothing = 0.01; 3D Printing/Pot_Knobs/Moog_Cap_v2.stl Executable file View File Hardware/PCB/precadsr/precadsr.xml Normal file View File # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: .

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