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Branches are equal. From c58f541d7e93b3fa0676ab29736db865cc42ef96 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups *-backups More repo cleanup, adopt github .gitignore file .gitattributes | 2 | 4.7k | Resistor | | | C2, C5, C6, C8, C9, C11, C12. - C10, C14 too small for a single 1.5 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator Molex Picoflex Ribbon-Cable Connectors, 90325-0024, 24 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator JST EH horizontal JST XA series connector, B12B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator Molex 734 Male header (for PCBs); Straight solder pin 1 (so is open or ground). Part of \nloop mod Part of speed \nswitch mod (0 F.Cu signal hide (31 B.Cu signal (32 B.Adhes user (33 F.Adhes user hide From 713014315986726ad96f361cfbc8e67551a6a879 Mon Sep 17 00:00:00 2001 Subject: [PATCH 11/13] more fixes more fixes - Gate out, with probably +12v gates. Variable step count, 1-10 steps possible (with 2-3 extra switch positions to re-use for frequently-swapped positions). External reset via momentary push button. Play.

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