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*.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Subject: [PATCH] KiCad 6, update symbols Hardware/PCB/precadsr/potsetc.kicad_sch | 1960 Hardware/PCB/precadsr/potsetc.sch | 84 Hardware/PCB/precadsr/precadsr.sch | 1867 Hardware/PCB/precadsr/precadsr.xml | 1656 create mode 100644 Hardware/Panel/precadsr_panel.png create mode 100644 Hardware/PCB/precadsr_Gerbers/precadsr-B_Mask.gbr create mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pretty/precadsr-panel-holes.kicad_mod create mode 100644.

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