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FF1926 FFG1926 FF1927 FFG1927 FFV1927 FF1928 FFG1928 FF1930 FFG1930 Virtex-7 BGA, 42x42 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=301, NSMD pad definition Appendix A BGA 324 0.8 CSGA324 Artix-7, Kintex-7 and Zynq-7000 BGA, 15x15 grid, 13x13mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f378vc.pdf WLCSP-72, 9x9 raster, 4.4084x3.7594mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf UFBGA-201, 15x15 raster, 13x13mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf UFBGA-100, 12x12 raster, 7x7mm package, pitch 0.8mm Altera BGA-68 M68 MBGA Altera UBGA U324 BGA-324 BGA-624, 25x25 grid, 21x21mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l151cc.pdf WLCSP-64, 8x8 raster, 3.357x3.657mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, based on the streets of the Derivative Works, in at least two of these two come directly from kicad hole_right = hole_left + 78.5; footprint "eurorack_rail_hole" (version 20221018) (generator pcbnew Show-stopping bugs needing bodges: Errant connection between R25 and R1, probably a result of KiCad adding junctions during a component move. This needs to be manipulated. Detail level is used. In loop position, loop\nis connected to trigger, gate jack is normalized\nto +12 V, 10 mA -12 V ## Photos ### Photos ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ## GitHub repository https://github.com/holmesrichards/precadsr Submodules git clone git@gitlab.com:rsholmes/precadsr.git git submodule init git submodule update Find and replace last few thin traces, fix teardrops and gnd fill db7d02719b68f4d2f81a25d8b6527257f18cc3a1 Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation updates the potentiometer shaft clf_indicator_angle_from_notch = 0; // 0 = A cylindrical knob, any other Contributor to use, copy, modify, and/or distribute this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE > POSSIBILITY OF SUCH DAMAGE. Copyright (c) 2009,2014 Google Inc. All rights reserved. Redistribution and use in source and binary forms, with or without Copyright 2010 The Go Authors. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the * * Covered Software must also be made available as Source Code, in accordance with section 3.2, and the following conditions: The above.

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