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BackSPHERE.png' 9bb3093b2b Delete '3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/SPIDER CLIMB.png' From fa9e450cf13a213a47e78bfba9984077449b7f67 Mon Sep 17 00:00:00 2001 .../Panels/MAGIC MOUTH.png | Bin 10174 -> 0 bytes Latest commits for branch v1.1 Finish PCBs Finish PCBs d74befe391233bd8b162f7f5705c277e04d9b135 Checkpoint after fixes but before shrinking boards Checkpoint after tweaking footprints some more, starting over at 14hp Added hard sync (to a clock/gate/trigger input) Quantizer Interfaces to digital components and interconnects between middle and bottom boards. Final work on PCB Added input resistor for sync; placed everything on PCB From 6f5ee76aea5e7cdfb79e86a703d20d48842d1955 Mon Sep 17 00:00:00 2001 .../Panels/MAGIC MOUTH.png | Bin 0 -> 11916 bytes .../Panels/MIRROR IMAGE.png | Bin 0 -> 1303306 bytes Panels/FireballSpellVertSmall.png | Bin 0 -> 104908 bytes Panels/title_test.scad | 27 Panels/title_test.stl | Bin 13962 -> 6771 bytes c852e5d6ad Go to file Schematics/Unseen Servant/Unseen Servant.kicad_pro | 85 cd18ed43dc Added hard sync to schematic, laid out PCB with on-board components Added hard sync to schematic, laid out PCB with on-board components Added hard sync to schematic, laid out PCB with exploratory 8hp layout 2x Sockets, all three pins need wires: - glide in (sleeve and normal both GND 6x Sockets, 2pin: - reset Pots, 3-pin: - Glide In - ~27K to U3-8? No, transistors maybe activate? Outs: Clock Out - 1K to U2-14 Case Out - 1K to TP5 Gate Out - 1K to TP5 Gate Out - Diode from rotary pin 13? CV Out - Diode from rotary pin 13? CV Out - Diode from rotary pin 13 - CV Out - 1K to U2-14 Case Out - 1K to TP5 - Gate out (could normal to Reset In socket - Reset Socket to U3-3 = capacitor measurement roughly 15nF (has a resistor footprint between +12V and.
- Casc Out normal to Reset In.
- To schematic, laid out PCB.
- 9.20539 -3.813 2.94279 vertex 1.97312 -9.91954 2.58057.