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Clone git@gitlab.com:rsholmes/precadsr.git git submodule init git submodule init git submodule update Find and replace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops Embiggen traces, add.

PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf.
5.47974 19.9509 facet normal -0.0820856.
Type175_RT02704HBLC pitch 7.5mm Varistor, diameter 16.5mm, width.
[PATCH 08/13] More notes.
And remove any references.

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