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Called a "Baby 8". Final tweaks, version submitted to JLCPCB on 20240124 v1.0 Add CV in to pause the clock Add CV in to pause the sequence. Probably can't do, or impractical: CV-controlled clock. Presumably the CV in to pause the sequence. Seven-segment display. Can be done, but requires a lot of wiring and increases risk of noise on power rails. Latest commits for file Panels/luther_triangle_10hp_rib_space_fixes.stl main MK_VCO/Panels/Font files/futura medium bt.ttf and /dev/null differ Latest commits for file Images/IMG_6771.JPG From fdd5744d7827ea7bf3ef1dd3cdfaa880615e1567 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Final revision; added custom DRC as project file afea9d5a2cf23e2a33a2927086270d4d602f5a2b 46614f2341 Go to file 74231bd333 Port in fixes from v1.1 74231bd333b049ab7b99365de62d937af76b0e42

5.282633e-07 -1.000000e+00 -5.537854e-07 facet normal 1.087067e-001 4.840002e-004 9.940737e-001.
-9.918118e-002 5.624815e+000 9.983999e+000 vertex.
-0.4548 0.888917 facet normal 0.989315 0.0975872 0.108317 facet.
8.679844e-01 vertex -1.088519e+02 9.665134e+01 9.338879e+00 vertex -1.086215e+02 9.665134e+01.

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